2. Determine the output frequency fout of a DDS system having 32-bit phase accumulator if DDS clock frequency fclk is 120 kHz and the value of the frequency tuning code M is 196608. Show your work.
3. Indicate the component of a digital signal processing system that converts discrete digital signal into analog signal.
a) DAC
b) CPU
c) ADC
d) FPU
4. An analog input signal x(t) = 1.5 +0.5 sin(100t) is sampled with 2 kHz sampling frequency fs. Assuming that sampling starts at t = 0 compute the value of the sample x[20]. Show your work.
a) DAC
Answer: fout = fclk * M / 2^32 = 120 kHz * 196608 / 2^32 = 0.735 Hz
Answer: x[20] = 1.5 + 0.5 sin(200π) = 1.5 + 0.5(0) = 1.5