Posted by Thomas on Monday, April 29, 2013 at 3:16pm.
1. An 7bit counter is wired as follows: The CLK input to the first stage (LSB) is the system clock. Each stage's output is used as the CLK input to the next higher stage. This counter is a:
A. MOD 128 ripple counter
B. MOD 256 synchronous counter
C. MOD 256 ripple counter
D. MOD 128 synchronous counter
2. Which group of logic devices represents the minimum hardware required for a MOD 128 synchronous counter?
A. four flip flops, two AND gates
B. five flip flops, three AND gates
C. six flip flops, four AND gates
D. seven flip flops, five AND gates
3.A 50 kHz clock pulse is applied to a MOD20 ripple counter. What is the output frequency?
A. 1.88 kHz
B. 1.55 kHz
C. 2.5 kHz
D. 2kHz
4. A production plant needs a counter that will count 1,800 items before resetting and recycling. How many flipflop stages would this counter require?
A. 13
B. 10
C. 11
D. 12

Computers  Anonymous, Saturday, May 24, 2014 at 1:32am
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