Here we examine noise in a digital channel between an AND gate and an inverter shown in Figure 16. The channel has a length of D=30m and noise is added in at the rate of 0.6Vm.

To correct for that noise, we introduce non-inverting buffers into the channel. The purpose of a buffer is to take an input and replicate it at the buffer's output. This buffer is useful because it clean up a signal which no longer meets the ouptut specification of the static discipline due to noise, so that it once again meets the output specifications of the static discipline.

These buffers, as well as the gates shown, obey the following static discipline: VOL=0.7V,VIL=2.0V,VIH=3.0V,VOH=4.3V. What is the minimum number of buffers required to connect between the digital links in order to ensure correct operation?

Now let's consider the NOR gate in Figure 18 which has VS=5V and the following given static discipline: VOL=0.9V,VIL=2.4V,VIH=3.5V,VOH=4V.

Assume that both MOSFETs have the same VT and RON=20kÙ.

What is the minimum value of VT in Volts that allows the NOR gate to satisfy the given static discipline? (This is 2.4)

What is the maximum value of VT in Volts that allows the NOR gate to satisfy the given static discipline? (This is 3.5)

What is the minimum value of RL (in kÙ) that allows the NOR gate to satisfy the given static discipline? ?????

91kOhms