Question

If we implemented the FSM above six states using two digits 0,1 and only one bit per cycle using the classic ROM + State register circuit (shown below), only one input and outputwhat would be the appropriate number of locations in the ROM and the appropriate width in bits for each location?

FSM ROM and Register Diagram

FSM ROM and Register Diagram

Number of locations in ROM:

This answer is incorrect.

Width of each location:

This answer is incorrect.

Answer 1

question solved thanks.